The present invention relates to an insulating transformer and a power conversion device, and more specifically to an insulating transformer suitable for an application of a method employing glass substrate for the insulation of the primary-side windings and the secondary-side windings of the insulating transformer.
In recent years, in order to provide automotive equipments with higher efficiencies and reduced power consumptions, buck-boost converters and inverters have been provided in driving systems for electric motors which generate driving force.
FIG. 6 is a block diagram roughly showing the configuration of an automotive driving system using a conventional buck-boost converter.
In FIG. 6, the automotive driving system comprises a power supply 1101, which supplies power to the buck-boost converter 1102; the buck-boost converter 1102, which raises and lowers voltages; an inverter 1103, which converts a voltage output from the buck-boost converter 1102 into a three-phase voltage; and a motor 1104, which drives the automobile. The power supply 1101 can comprise a feed voltage provided from an overhead line, or batteries connected in series.
During an operation of the vehicle, the buck-boost converter 1102 raises the voltage of the power supply 1101 (for example, 280 V) to a voltage appropriate to drive the motor 1104 (for example, 750 V), and supplies the voltage to the inverter 1103. By executing on/off control of a switching element, the voltage raised by the buck-boost converter 1102 is converted into a three-phase voltage, current is passed to each of the phases of the motor 1104, and the vehicle speed can be changed by controlling the switching frequency.
On the other hand, during an operation of brakes, the inverter 1103 executes on/off control of the switching element in synchronization with the voltage occurring in the each phase of the motor 1104 to perform rectification, and after conversion into a DC voltage, supplies the result to the buck-boost converter 1102. The buck-boost converter 1102 can, then, lower the voltage generated from the motor 1104 (for example, 750 V) to the voltage of the power supply 1101 (for example, 280 V), to perform power regeneration.
FIG. 7 is a block diagram briefly showing the configuration of the buck-boost converter of FIG. 6.
In FIG. 7, the buck-boost converter 1102 is provided with a reactor L, which accumulates energy; a capacitor C, which accumulates charge; switching elements SW1 and SW2, which pass and block current flowing into the inverter 1103; and control circuits 1111 and 1112, which respectively generate control signals to instruct the switching elements SW1 and SW2 to conduct or not to conduct.
Also, the switching elements SW1 and SW2 are connected in series, and the connection point of the switching elements SW1 and SW2 is connected to the power supply 1101 via the reactor L. Here, the switching element SW1 is provided with an IGBT (Insulated Gate Bipolar Transistor) 1105, which performs switching operations according to control signals from the control circuit 1111; a flywheel diode D1, which carries current in the direction opposite to the direction of current flowing in the IGBT 1105, is connected in parallel with the IGBT 1105.
Further, the switching element SW2 is provided with an IGBT 1106 which performs switching operations according to control signals from the control circuit 1112; a flywheel diode D2, which carries current in the direction opposite to the direction of current flowing in the IGBT 1106, is connected in parallel with the IGBT 1106. And, the collector of the IGBT 1106 is connected to both of the capacitor C and the inverter 1103.
FIG. 8 shows the waveform of current flowing in the reactor L of FIG. 7 during a step-up operation.
In FIG. 8, during the step-up operation, when the IGBT 1105 of the switching element SW1 turns on (is conducting), current I flows in the reactor L via the IGBT 1105, and energy LI2/2 is stored in the reactor L.
Next, when the IGBT 1105 of the switching element SW1 turns off (is non-conducting), current flows in the flywheel diode D2 of the switching element SW2, and the energy stored in the reactor L is sent to the capacitor C.
On the other hand, in a step-down operation, when the IGBT 1106 of the switching element SW2 turns on (conducting state), current I flows to the reactor L via the IGBT 1106, and energy LI2/2 is stored in the reactor L.
Next, when the IGBT 1106 of the switching element SW2 turns off (non-conducting state), current flows to the flywheel diode D1 of the switching element SW1, and the energy stored in the reactor L is regenerated to the power supply 1101.
Here, by changing the on-time (ON Duty) of the switching elements, the step-up and step-down voltages can be adjusted, and the approximate voltage value can be determined using equation (1) below.VL/VH=ON Duty(%)  (1)
Here, VL is the power supply voltage, VH is the voltage after step-up or step-down, and the ON Duty is the conducting interval of the switching elements SW1 and SW2 as a fraction of the switching period.
In actuality, there are fluctuations in the load, fluctuations in the power supply voltage VL, and similar, and so the voltage VH after step-up or step-down is monitored. The on-time (ON Duty) of the switching elements SW1 and SW2 is controlled such that the voltage VH after step-up/step-down is the target value.
Also, the sides of the control circuits 1111, 1112 connected to the vehicle body are at low voltage, and the arm sides connected to the switching elements SW1 and SW2 are at high voltage. Hence, in order that the operator is not exposed to danger even when accidents such as malfunctions of the switching elements SW1, SW2 occur, a photocoupler is used on the arm sides to exchange signals while electrically insulating the control circuits 1111 and 1112.
FIG. 9 is a block diagram briefly showing the configuration of an intelligent power module for a conventional buck-boost converter.
In FIG. 9, the buck-boost converter intelligent power module is provided with switching elements SWU and SWD which pass and block current flowing to the load, and a control circuit 1 which generates control signals respectively indicating conduction and non-conduction of the switching elements SWU and SWD. Here, the control circuit 1 can comprise a CPU 4 or logic IC, or a system LSI provided with a logic IC and CPU, or similar.
The switching elements SWU and SWD are connected in series so as to operate the upper arm 2 and the lower arm 3 respectively. An IGBT 6 which performs a switching operation according to gate signals SU4 is provided to the switching element SWU, and a flywheel diode DU1, which passes current in the direction opposite to the current flowing in the IGBT 6, is connected in parallel with the IGBT 6. On the chip on which the IGBT 6 is formed are also provided a temperature sensor used for measurement of VF changes in the diode DU2 arising from chip temperature changes, and a current sensor which divides the emitter current of the IGBT 6 by means of resistances RU1 and RU2 and detects the main circuit current.
Further, the switching element SWD is provided with an IGBT 5 which performs switching operations according to a gate signal SD4; a flywheel diode DD1, which passes current in the direction opposite to the direction of current flowing in the IGBT 5, is connected in parallel with the IGBT 5. Also, on the chip on which the IGBT 5 is formed are also provided a temperature sensor used for measurement of VF changes in the diode DD2 arising from chip temperature changes, and a current sensor which divides the emitter current of the IGBT 5 by means of resistances RD1 and RD2 and detects the main circuit current.
On the side of the upper arm 2 are provided a gate driver IC 8 with protection functions, which generates a gate signal SU4 to drive the control terminal of the IGBT 6 while monitoring an overheating detection signal SU6 from the temperature sensor and an overcurrent detection signal SU5 from the current sensor, as well as an analog-PWM converter CU which generates PWM signals corresponding to the temperature of the IGBT 6.
Also, on the side of the lower arm 3 are provided a gate driver IC 7 with protection functions, which generates a gate signal SD4 to drive the control terminal of the IGBT 5 while monitoring an overheating detection signal SD6 from the temperature sensor and an overcurrent detection signal SD5 from the current sensor, as well as an analog-PWM converter CD which generates PWM signals corresponding to the temperature of the IGBT 5.
Between the control circuit 1 connected to the vehicle body, and the high-voltage upper arm 2 and lower arm 3, are inserted photocouplers FU1 to FU3 and FD1 to FD3, respectively. In the control circuit 1, signals are exchanged using the photocouplers FU1 to FU3 and FD1 to FD3 while maintaining electrical insulation with the upper arm 2 and lower arm 3.
That is, on the side of the upper arm 2, SU1(PWM signals for gate driving) output from the CPU 4 are input to the gate driver IC 8 with protection functions via the photocoupler FU1. And, alarm signals SU2 output from the gate driver IC 8 with protection functions are input to the CPU 4 via the photocoupler FU2. Also, IGBT chip temperature PWM signals SU3 output from the analog-PWM converter CU are input to the CPU 4 via the photocoupler FU3.
On the other hand, on the side of the lower arm 3, PWM signals SD1 for gate driving output from the CPU 4 are input to the gate driver IC 7 with protection functions via the photocoupler FD1. And, alarm signals SD2 output from the gate driver IC 7 with protection functions are input to the CPU 4 via the photocoupler FD2. Also, IGBT chip temperature PWM signals SD3 output from the analog-PWM converter CD are input to the CPU 4 via the photocoupler FD3.
FIG. 10 is a block diagram briefly showing the configuration of a photocoupler peripheral circuit.
In FIG. 10, the photocoupler 2008 is provided with an infrared light-emitting diode 2003, which emits infrared light as a result of forward current If, a light-receiving diode 2004, which receives emitted infrared light, and a bipolar transistor 2005, which performs current amplification with the photocurrent generated by the light-receiving diode 2004 as the base current. The cathode of the infrared light-emitting diode 2003 is connected via a resistance 2002 to a field effect transistor 2001, and the collector of the bipolar transistor 2005 is connected via a resistance 2006 to a power supply voltage Vcc2, while output signals Vout output via the collector of the bipolar transistor 2005 are input to the IGBT driver IC 2007.
When a gate signal SP is input to the field effect transistor 2001, a forward current If flows in the infrared light-emitting diode 2003, and infrared light is emitted. Then, the infrared light emitted from the infrared light-emitting diode 2003 is received by the light-receiving diode 2004, and a photocurrent corresponding to this infrared light flows in the base of the bipolar transistor 2005. When this photocurrent flows in the base of the bipolar transistor 2005, a collector current Ic flows in the bipolar transistor 2005, and the collector current Ic flows in the resistance 2006 one end of which is connected to the power supply voltage Vcc2, and the change in the voltage at the other end of the resistance 2006 is input to the IGBT driver IC 2007 as an output signal Vout.
Here, the input/output characteristics of the isolated photocoupler 2008 can be defined in terms of the current transfer ratio (CTR), that is, Ic/If. When designing a circuit using a photocoupler 2008, consideration must be paid to: the temperature characteristic of the current gain hfe of the bipolar transistor 2005; degradation of the emission efficiency lifetime of the infrared light-emitting diode 2003; and variation in the CTR, and similar.
FIG. 11 shows the temperature characteristic of the current transfer ratio of a photocoupler.
In FIG. 11, the lower the temperature, the lower is the current transfer ratio of the photocoupler 2008. The cause of this result is the temperature characteristic of the current gain hfe of the bipolar transistor 2005.
FIG. 12 shows the aging degradation of the current transfer ratio of a photocoupler.
In FIG. 12, the CTR of the photocoupler 2008 declines depending on the forward current of the light-emitting diode 2003, the ambient temperature, and cumulative usage time; in particular, when the continuous usage time of the photocoupler 2008 exceeds 1000 hours, the decline of the CTR appears prominently.
FIG. 13 shows variation in the current transfer ratio of a photocoupler.
In FIG. 13, the variation in the photocoupler current transfer ratio is large; possible reasons include variations in the light emission efficiency of the light-emitting diode 2003 and in the current gain hfe of the bipolar transistor 2005.
And, when using a photocoupler as the insulated transmission means of an intelligent power module for the buck-boost converter of FIG. 9, circuit design must be performed while taking the above points into consideration, but it is difficult to satisfy demands for continuous operation of ten years or longer in high-temperature environments, such as those of vehicles or industrial equipment.
On the other hand, there is also the method by using insulating transformers, rather than photocouplers, as the insulation means of transmission signals. As such insulating transformers, greatly miniaturized microtransformers utilizing MEMS (Micro-Electro-Mechanical Systems) technology have been commercialized by a number of companies.
In FIG. 14A, a summary cross-sectional view of the configuration of a conventional insulating transformer is shown, and FIG. 14B is a summary plane view of the insulating transformer of FIG. 14A.
In FIGS. 14A, 14B, a lead wire layer 12 is buried in the semiconductor substrate 11, and the primary coil pattern 14 is formed on the semiconductor substrate 11. And, the primary coil pattern 14 is connected via the lead portion 13 to the lead wire layer 12. On the primary coil pattern 14 is formed a planarization film 15, and on the planarization film 15 is formed the secondary coil pattern 17; the secondary coil pattern 17 is covered with a protective film 18. An opening portion 19 which exposes the center of the secondary coil pattern 17 is formed in the protective film 18, and by connecting a bonding wire to the center of the secondary coil pattern 17 via the opening portion 19, a lead wire from the secondary coil pattern 17 is obtained.
The primary coil pattern 14 and secondary coil pattern 17 can, for example, have a winding width of 5 to 10 μm, a thickness of 4 to 5 μm, and a maximum winding outer diameter of 500 μm.
FIGS. 15A-15L and FIGS. 16A-16H are cross-sectional views showing a conventional insulating transformer manufacturing method.
In FIG. 15A, impurities such as As, P, B, or similar are selectively injected into a semiconductor substrate 51, to form a leadout diffusion layer 52 in the semiconductor substrate 51 in order to form a lead from the center of the primary coil pattern 55a. The material of the semiconductor substrate 51 can, for example, be selected from among Si, Ge, SiGe, SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, or similar.
Next, as shown in FIG. 15B, plasma CVD or another method is used to form an insulating layer 53 on the semiconductor substrate 51 on which the leadout diffusion layer 52 has been formed. As the material of the insulating layer 53, for example, a silicon oxide film, silicon nitride film, or similar can be used.
Next, as shown in FIG. 15C, a photolithography technique is used to form a resist pattern 54, in which is provided an opening portion 54a corresponding to the leadout portion from the center of the primary coil pattern 55a, on the insulating layer 53.
Next, as shown in FIG. 15D, by etching the insulating layer 53 using as a mask the resist pattern 54 with an opening portion 54a formed, an opening portion 53a corresponding to a leadout portion from the center of the primary coil pattern 55a is formed in the insulating layer 53.
Next, as shown in FIG. 15E, the resist pattern 54 is stripped from the insulating layer 53 using a reagent.
Next, as shown in FIG. 15F, sputtering, evaporation deposition, or another method is used to form a conducting film 55 on the insulating layer 53. As the material of this conducting film 55, Al, Cu, or another metal can be used.
Next, as shown in FIG. 15G, by using photolithography techniques, a resist pattern 56 corresponding to the primary coil pattern 55a is formed.
Next, as shown in FIG. 15H, the resist pattern 56 is used as a mask to etch the conducting film 55, to form the primary coil pattern 55a on the insulating layer 53.
Next, as shown in FIG. 15I, the resist pattern 56 is stripped away from the primary coil pattern 55a using a reagent.
Next, as shown in FIG. 15J, a planarization film 57 is formed by plasma CVD or similar on the insulating layer 53 formed on the primary coil pattern 55a. As the material of the planarization film 57, for example, a silicon oxide film, silicon nitride film, or similar can be used.
Next, as shown in FIG. 15K, oblique etching or CMP (Chemical-Mechanical Polishing), or another method is used to flatten the planarization film 57, removing irregularities on the surface of the planarization layer 57.
Next, as shown in FIG. 15L, by using a photolithography technique, a resist pattern 58, provided with an opening portion 58a corresponding to a wire extraction portion at the outside end of a secondary coil pattern 60a, is formed on the planarization film 57.
Next, as shown in FIG. 16A, by etching the planarization film 57 using the resist pattern 58 provided with an opening portion 58a as a mask, an opening portion 57a corresponding to the wire extraction portion at the outside end of the secondary coil pattern 60a is formed in the planarization film 57.
Next, as shown in FIG. 16B, the resist pattern 58 is stripped from the planarization film 57 using a reagent.
Next, as shown in FIG. 16C, a separation layer 59 to separate the primary coil pattern 55a and secondary coil pattern 60a is formed on the planarization film 57. As the method of formation of the separation layer 59, a spin coating method or similar can be used to form a polyimide layer on the planarization film 57. Alternatively, as the method of formation of the separation layer 59, sputtering can be performed to deposit a silicon oxide film on the planarization film 57.
Next, as shown in of FIG. 16D, sputtering, evaporation deposition, or another method is used to form a conducting film 60 on the separation layer 59. As the material of the conducting film 60, Al, Cu, or another metal can be used.
Next, as shown in FIG. 16E, a photolithography technique is used to form a resist pattern 61 corresponding to a secondary coil pattern 60a. 
Next, as shown in FIG. 16F, by etching the conducting film 60 using the resist pattern 61 as a mask, the secondary coil pattern 60a is formed on the separation layer 59.
Next, as shown in FIG. 16G, the resist pattern 61 is stripped from the secondary coil pattern 60a using a reagent.
Next, as shown in FIG. 16H, plasma CVD or another method is used to form a protection film 62 on the separation film 59 with the secondary coil pattern 60a formed on top. As the material of the protection film 62, for example, silicon oxide film, silicon nitride film, or similar can be used. Then, by using a photolithography technique and etching technique to pattern the protection film 62, the end portion and center portion of the secondary coil pattern 60a are exposed.
Moreover, for example in Patent Document 1 (Japanese Patent Laid-open No. 2005-5685 corresponding to U.S. Pat. No. 6,927,664), a method is disclosed in which, in a transformer device formed from a first wiring layer and a second wiring layer, when projecting onto one among the first wiring layer and the second wiring layer from one among the vertical upward direction and the vertical downward direction, the projected outer shape has a symmetric shape with reference to a reference plane stipulated in advance, and moreover, by configuring the portions of the projected outer shape which intersect the first wiring layer and second wiring layer so as not to intersect by using the first wiring layer and second wiring layer, the occupied area of the transformer device is reduced.
Further, in Patent Document 2 (U.S. Patent Application Publication No. 2005/230837), an air-core transformer is disclosed in which first and second coils are surrounded by protective rings in the horizontal direction.
And, for example in Patent Document 3 (Japanese Patent Laid-open No. 2005-310959), a method is disclosed in which, by constructing a laminated-layer transformer from magnetic sheets on the surfaces of each of which are provided coil conductors, and glass insulating layers provided at the surfaces of each, while suppressing drops in the amount of coupling between coils of the laminated-layer transformer, the insulation breakdown voltage between coils can be raised without increasing the height dimensions of components.
However, in the method of manufacture of an insulating transformer of FIGS. 15, 16, when employing a method in which the separation layer 59 is formed by spin-coating a polyimide layer, the film thickness of the separation layer 59 is limited to 20 μm or less in order to maintain flatness of the surface.
And, in a method in which sputtering deposition of a silicon oxide film is used as the separation layer 59, the film thickness of the separation layer 59 is limited to 10 μm or less, in consideration of the surface unevenness due to thermal stress during film deposition and the film deposition rate.
On the other hand, in automotive, industrial equipments, and other applications, an ESD (electrostatic discharge) tolerance voltage of from 15 to 30 kV, equivalent to the electrostatic charge of the human body, is required; if a microtransformer such as that of FIG. 16 combines a primary-side circuit and secondary-side circuit packaged as an IC, then voltages in this 15 to 30 kV range are applied to the separation layer 59. Dielectric breakdown occurs when 8 to 11 kV of ESD is applied to a polyimide layer of thickness 20 μm, or when approximately 7 kV of ESD is applied to a silicon oxide film of thickness 10 μm. Therefore, there has been a problem that, if a voltage between 15 and 30 kV is applied to the separation layer 59, dielectric breakdown of the separation layer 59 occurs.
Therefore, an object of this invention is to provide an insulating transformer and power conversion device which, while suppressing the aging degradation and improving reliability and environmental tolerance, alleviates the influence of noise originating in external magnetic flux, and enables exchange of signals while electrically insulating the low-voltage side and high-voltage side.
Further objects and advantages of the invention will be apparent from the following description of the invention.